The present invention relates to a method of communication, and, more particularly, to a method of digital communication between a master unit and a slave unit.
Digital transmissions, such as between a master and a slave, can be made over different media. The transmission channels may be wire links or optical fibers or the space between two antennas. FIG. 1 shows an exemplary communication using RF links. In this figure, a master unit 1 uses a transceiver antenna 11 to exchange messages with a slave unit 2 also equipped with a transceiver antenna 22. The transmission channel is through air between the two antennas 11 and 22.
The master unit and the slave unit may each either transmit messages to the other unit or receive messages from the other unit. The master unit is distinguished from the slave unit in that it is the master unit that takes the initiative in the communication. The master unit may thus be, for example, the central processing unit of a computer. The slave unit may then be one of its peripherals, such as, a printer that is remote-controlled by any transmission channel.
In the prior art, there are known methods of communication including the transmission of messages comprising a useful information word and one or more service bits. The transmission is carried out serially according to a specified communications protocol. A protocol of this kind specifies the format and the syntax of the messages that are transmitted by the master unit to the slave unit or vice versa. The transmission is done synchronously. It is sequenced at a specified rate, the units using known approaches to lock in to the rate of one and the same clock or two synchronous or bi-synchronous clocks.
FIG. 2 shows a fairly simple example of a known message format. The message comprises first of all a starting bit START whose function is to synchronize the clock of the addressee unit with the received message. Then, the message comprises a useful information word INFO that is encoded, for example, on eight bits (one byte). This word may be an instruction word whose value indicates the nature of a command to be carried out by the addressee unit. This instruction may, for example, be a read or write command. It may also be an address word whose value indicates the address or a part of the address of a memory location of the addressee unit. At this memory location of the addressee unit, a data element may, for example, be read or written. Finally, it may also be a data word whose value indicates the value of a data element processed by the addressee unit.
The message also comprises a check bit CHECK which, in particular, may be a parity check bit. The value of the parity check bit CHECK is fixed at the logic value 1 or 0. This value is determined in such a way that the sum of the values of the bits of the useful information INFO gives an even value or an odd value depending on the type of parity chosen. The role of the parity check bit CHECK is to enable the addressee unit to detect transmission errors if any. In such a case, the addressee unit may, as the case may be, request a retransmission of the message.
Finally, in the prior art, the message comprises an end-of-transmission bit STOP. This bit is used solely to indicate the end of the message. Following this end-of-transmission bit STOP, each protocol generally provides for a number of elementary timing intervals during which a transmission unit no longer transmits any bit on the channel. Thus, the channel is left free so that the addressee unit sends a bit with a specified logic value for the acknowledgment of the communication. The logic value of this acknowledgment bit indicates whether the message has been accurately received.
The basic approach used in the prior art to determine whether the message has been accurately received is the check performed by the parity check bit CHECK. Furthermore, depending on the protocol used, a specified value of the acknowledgment bit prompts a retransmission of the message in the event of incorrect reception. In FIG. 2, four of these elementary timing intervals following the bit STOP have been shown.
In electronic systems, there are a very large number of different communication protocols. Each protocol is suited to specific constraints of a given application. These constraints may be the size of the words to be transmitted, the need to secure communications against passive or active intervention by ill-intentioned individuals, constraints related to an acknowledgment mode, maximum duration of transmission in relation to the bit rate, etc. Within such a system, the master unit and the slave unit conform to a common communications protocol so that they can communicate with each other intelligibly.
In general, the information on the communications protocols developed by electronics systems manufacturers is widely disseminated. These manufacturers thus enable other manufacturers to incorporate these systems into more complex assemblies or develop new industrial and/or commercial applications thereof.
The result thereof, with respect to the size of the communications in which such protocols are used, is that the integrity of the information transmitted has to be optimum. In other words, it is necessary for the transmission to be affected by a minimum of errors. Furthermore there are applications where the integrity of the information exchanged is a major constraint in the specifications. In the prior art, the control of the quality of the transmission of the binary signals lies basically in the analysis and interpretation of the value of the parity check bit CHECK mentioned above.
Unfortunately, this check is not completely reliable. In particular, it proves to be valid only when an odd number of bits has been transmitted erroneously. Indeed, even numbers of errors are likely to compensate for one another with respect to the parity check bit. FIGS. 3A, 3B and 3C show three cases of possible transmission. For these examples, the message format of the kind shown in FIG. 2 has been kept. No special attention has been paid in these figures, to the value of the starting bit START and end-of-transmission bit STOP. All that has been taken into account here is the values of the useful information word bit INFO and the parity check bit CHECK.
FIG. 3A shows the case of a useful information bit INFO1 received without transmission errors. It has been chosen arbitrarily to give the logic value 1 to seven first bits B1, B2, B3, B4, B5, B6, B7 of the useful information word INFO1. A last it B8 of the useful information word INFO1 is set at the logic value 0. If it is chosen to adopt a so-called even type of parity, the parity check bit CHECK will then take the logic value 1. In the case of FIG. 3A, the transmission of the useful information word INFO1 is not affected by errors. A useful information word INFO2 which is the word resulting from the transmission of the useful information word INFO1 consequently has the same binary values for each of the bits.
In general, a circuit formed by elementary logic gates is used to ascertain that the result of the transmission of the useful word is in accordance with the result expected with regard to the value of the parity check bit and depending on the type of parity adopted. FIG. 3B shows the case of the same useful information word INFO1 received with a transmission error. A useful information word INFO3 is received in the reception unit following the transmission of the useful information word INFO1. In FIG. 3B, the eighth bit B8 of the useful information word INFO3 is different from the eighth bit of the useful information word INFO1. The transmission has therefore been erroneous and the useful information word INFO3 is then no longer matched with the parity check bit CHECK. It would have been the same if three, five or seven of the eight bits constituting the useful information word INFO3 had been different from the bits of the useful information word INFO1. Indeed, in all cases, the sum of the eight bits of the useful information word INFO3 added to the value of the parity check bit CHECK gives an odd number, while the type of parity is a so-called even type of parity.
FIG. 3C shows the useful information word INFO1 which was transmitted to the reception unit in the form of a useful information word INFO4. The seventh and eighth bits of the useful information word INFO4 are different from the seventh and eighth bits of the useful information word INFO1. However, if we take the sum of the values of the bits of the information word INFO4 added to the value of the parity check bit CHECK, we find an even number. This result therefore matches the type of parity chosen. The same would have been the case if four, six or eight of the bits of the information word INFO1 had been transmitted wrongly to the reception unit.
With the analysis of these three figures, therefore, it can be shown that the existence of the parity bit is not always sufficient to ensure the integrity of the transmitted data. To this, it must be added that the parity bit itself may be wrongly transmitted. This could even lead to cases where the useful information word INFO1 present in the above three figures could have been transmitted correctly, but in which the parity bit itself introduces an error.
The prior art furthermore discloses the existence of counters operating on two bits, a first counter in the reception unit and a second counter in the transmission unit. These counters are designated as a reception counter and a transmission counter. At each new reception of a message that is properly acknowledged, these counters are incremented and the useful information word INFO is directed towards a register that is determined by the value of the reception counter. Each of these registers is proper to the nature of this useful information word INFO. A typical sequence of transmission of a message may be subdivided into a succession of receptions of useful information words.
FIG. 4 shows a diagrammatic view of the reception of a message according to the prior art. For a write operation, a transmission sequence of a message can be subdivided most usually into four phases of transmission and reception. The order of these phases is important. In a first phase, a reception unit 40 receives a useful information word corresponding to a code pertaining to an instruction to be performed. A reception selector 41 directs the code of the instruction into a first specific register REG1 of a battery of registers REG. Then, a reception counter 42 is incremented by one unit. The battery of registers REG has three other registers REG2, REG3 and REG4.
The second phase of the reception is the reception of the least significant bits of the address. The reception selector 41 directs this part of the address into a second register REG2 of the battery of registers REG proper to this type of data. The reception counter 42 is again incremented by one unit.
The third phase of the reception is the reception of the most significant bits of the address. This useful information is also directed by the reception selector 42 in a third register REG3 of the battery of registers REG. Then, a new incrementation of the reception counter 42 takes place. Then comes the last phase of the reception which includes the reception of the data information. This information is stored in a fourth register REG4 of the battery of registers REG. The reception counter 42 is reinitialized.
Should the first information element transmitted to the reception unit 40 be a code corresponding to a read instruction, the reception counter will resume its initial value after only three useful information bits received. Indeed, in the read mode, it is not necessary to send any useful data information.
At each reception of a useful piece of information considered to be accurate with respect to the parity check bit, an acknowledgment bit is sent to the transmission unit. The transmission counter is then itself incremented.
The prior art discloses systems in which, in the event of an error detected during the interpretation of the parity check bit CHECK, the totality of the transmission sequence is reiterated. In the prior art, in the event of problems during transmission, such as, the loss or omission of the dispatching of useful information, the reception unit will not acknowledge accurate reception of the expected useful information. The bit counter will then not be incremented. Thus, the following useful information is directed towards registers that are not appropriate to this information. This inevitably leads to a transmission error which may cause varying degrees of undesired operation or failure.
The object of the present invention is to mitigate the above mentioned drawbacks of the prior art. Indeed, the invention is directed to a method of communication between a master unit and a slave unit of the type including the transmission of messages comprising a useful information word of a specified type, as well as service bits. The service bits comprise at least one coherence bit whose value signifies the type of useful information transmitted. Thus, the communication is made more reliable by an additional check on the integrity of the received message. In substance, supplementary means is thus introduced into the protocol itself to verify the integrity of the information transmitted.